[all-commits] [llvm/llvm-project] 5d361a: AMDGPU/GlobalISel: Fix broken / copy paste error i...

Tue Jun 6 14:07:33 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5d361ad2a4d41edcc796aa83c0dbf9420ca4929f
      https://github.com/llvm/llvm-project/commit/5d361ad2a4d41edcc796aa83c0dbf9420ca4929f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-06-06 (Tue, 06 Jun 2023)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix broken / copy paste error in sext_inreg test

  Commit: eece6ba283bd763e6d7109ae9e155e81cfee0651
      https://github.com/llvm/llvm-project/commit/eece6ba283bd763e6d7109ae9e155e81cfee0651
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-06-06 (Tue, 06 Jun 2023)

  Changed paths:
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
    M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
    M llvm/docs/LangRef.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/include/llvm/Analysis/TargetLibraryInfo.h
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
    M llvm/include/llvm/CodeGen/ISDOpcodes.h
    M llvm/include/llvm/CodeGen/RuntimeLibcalls.h
    M llvm/include/llvm/IR/ConstrainedOps.def
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/IR/RuntimeLibcalls.def
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
    M llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/AMDGPU/VOP2Instructions.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    R llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir
    R llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.f16.ll
    A llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
    A llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
    A llvm/test/CodeGen/AMDGPU/strict_ldexp.f32.ll
    A llvm/test/CodeGen/AMDGPU/strict_ldexp.f64.ll
    A llvm/test/CodeGen/Mips/ldexp.ll
    A llvm/test/CodeGen/PowerPC/ldexp-libcall.ll
    A llvm/test/CodeGen/PowerPC/ldexp.ll
    A llvm/test/CodeGen/X86/ldexp-f80.ll
    A llvm/test/CodeGen/X86/ldexp-libcall.ll
    A llvm/test/CodeGen/X86/ldexp-not-readonly.ll
    A llvm/test/CodeGen/X86/ldexp-strict.ll
    A llvm/test/CodeGen/X86/ldexp-wrong-signature.ll
    A llvm/test/CodeGen/X86/ldexp-wrong-signature2.ll
    A llvm/test/CodeGen/X86/ldexp.ll
    M llvm/test/MC/AMDGPU/gfx10_asm_vop2.s
    M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s
    M llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
    M llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
    M llvm/test/MC/Disassembler/AMDGPU/gfx10_vop3.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx8_vop3.txt
    M llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
    M llvm/test/Transforms/SpeculativeExecution/spec-calls.ll

  Log Message:
  -----------
  IR: Add llvm.ldexp and llvm.experimental.constrained.ldexp intrinsics

AMDGPU has native instructions and target intrinsics for this, but
these really should be subject to legalization and generic
optimizations. This will enable legalization of f16->f32 on targets
without f16 support.

Implement a somewhat horrible inline expansion for targets without
libcall support. This could be better if we could introduce control
flow (GlobalISel version not yet implemented). Support for strictfp
legalization is less complete but works for the simple cases.

  Commit: 8a21ea1d0a3883a8d0aa15440388f91e49da4d08
      https://github.com/llvm/llvm-project/commit/8a21ea1d0a3883a8d0aa15440388f91e49da4d08
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-06-06 (Tue, 06 Jun 2023)

  Changed paths:
    M clang/include/clang/Basic/Builtins.def
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/test/CodeGen/aix-builtin-mapping.c
    M clang/test/CodeGen/constrained-math-builtins.c
    M clang/test/CodeGen/math-builtins.c
    M clang/test/CodeGenOpenCL/builtins-f16.cl
    M clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl

  Log Message:
  -----------
  clang: Start emitting intrinsic for __builtin_ldexp*

Also introduce __builtin_ldexpf16.

Compare: https://github.com/llvm/llvm-project/compare/88632e480696...8a21ea1d0a38