[all-commits] [llvm/llvm-project] fbdcd5: [GlobalISel] Fix DIVREM combine from inserting a d...

Amara Emerson via All-commits all-commits at lists.llvm.org
Sun Jun 4 00:44:22 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fbdcd54442ef9435d753ae974d33992f99d85ad8
  Author: Amara Emerson <amara at apple.com>
  Date:   2023-06-04 (Sun, 04 Jun 2023)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-conflict.mir

  Log Message:
  [GlobalISel] Fix DIVREM combine from inserting a divrem before its operands' defs.

In some rare corner cases where in between the div/rem pair there's a def of
the second instruction's source (but a different vreg due to the combine's
eqivalence checks), it will place the DIVREM at the first instruction's point,
causing a use-before-def. There wasn't an obvious fix that stood out to me
without doing more involved analysis than a combine should really be doing.

Fixes issue #60516

I'm open to new suggestions on how to approach this, as I'm not too happy
at bailing out here. It's not the first time we run into issues with value liveness
that the DAG world isn't affected by.

Differential Revision: https://reviews.llvm.org/D144336

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