[all-commits] [llvm/llvm-project] e79fac: [AArch64] Adjust costs of i1 and/or/xor reductions

David Green via All-commits all-commits at lists.llvm.org
Thu Jun 1 01:29:01 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e79fac2968dcf0ed819fd374ce17845150344758
  Author: David Green <david.green at arm.com>
  Date:   2023-06-01 (Thu, 01 Jun 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/AArch64/reduce-and.ll
    M llvm/test/Analysis/CostModel/AArch64/reduce-or.ll
    M llvm/test/Analysis/CostModel/AArch64/reduce-xor.ll

  Log Message:
  [AArch64] Adjust costs of i1 and/or/xor reductions

This expands the reduction cost of i1 and/or/xor, so that larger type sizes get
handled by the existing code. For i1 reductions - and will use maxv, or will use
minv and xor will use addv, plus the cost of legalizing the type for larger
vectors using and/or/xor. The i1 vectors will be legalized to higher width
integers (say v16i8), which this overrides the cost of. As with all i1 vectors
there is a chance that the types the i1 vector is created with and how it is
used will not match, introducing extra extends that are not necessarily

Differential Revision: https://reviews.llvm.org/D151184

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