[all-commits] [llvm/llvm-project] 3b3912: Reapply [SelectionDAG] Handle NSW for ADD/SUB in c...

Dhruv Chawla via All-commits all-commits at lists.llvm.org
Wed May 31 03:25:57 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3b3912e9b8cbcba32f1deed81a0280e3141281e3
  Author: Dhruv Chawla <dhruv263.dc at gmail.com>
  Date:   2023-05-31 (Wed, 31 May 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll

  Log Message:
  Reapply [SelectionDAG] Handle NSW for ADD/SUB in computeKnownBits()

This exposed a miscompile due to incorrect flag preservation in
integer type legalization, which has been fixed in D151472.


This patch is a continuation of D150110. It separates the cases for
ADD and SUB into their own cases so that computeForAddSub can be
directly called and the NSW flag passed. This allows better
optimization when the NSW flag is enabled, and allows fixing up the
TODO that was there previously in SimplifyDemandedBits.

Differential Revision: https://reviews.llvm.org/D150769

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