[all-commits] [llvm/llvm-project] b66551: [SelectionDAG] Handle NSW for ADD/SUB in computeKn...

[Dhruv Chawla via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b66551370fdfc6f357ae0d77237119d2b1077b62
      https://github.com/llvm/llvm-project/commit/b66551370fdfc6f357ae0d77237119d2b1077b62
  Author: Dhruv Chawla <dhruv263.dc at gmail.com>
  Date:   2023-05-17 (Wed, 17 May 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/Thumb2/mve-blockplacement.ll

  Log Message:
  -----------
  [SelectionDAG] Handle NSW for ADD/SUB in computeKnownBits()

This patch is a continuation of D150110. It separates the cases for
ADD and SUB into their own cases so that computeForAddSub can be
directly called and the NSW flag passed. This allows better
optimization when the NSW flag is enabled, and allows fixing up the
TODO that was there previously in SimplifyDemandedBits.

Differential Revision: https://reviews.llvm.org/D150769