[all-commits] [llvm/llvm-project] d68118: [GVN] Improve PRE on load instructions
weiguozhi via All-commits
all-commits at lists.llvm.org
Tue May 16 18:12:39 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: d6811826371d82de074d0c3e10040114eee69897
https://github.com/llvm/llvm-project/commit/d6811826371d82de074d0c3e10040114eee69897
Author: Guozhi Wei <carrot at google.com>
Date: 2023-05-17 (Wed, 17 May 2023)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/PRE/2011-06-01-NonLocalMemdepMiscompile.ll
M llvm/test/Transforms/GVN/PRE/2017-06-28-pre-load-dbgloc.ll
M llvm/test/Transforms/GVN/PRE/2018-06-08-pre-load-dbgloc-no-null-opt.ll
A llvm/test/Transforms/GVN/PRE/pre-load-dbg.ll
M llvm/test/Transforms/GVN/PRE/pre-load.ll
M llvm/test/Transforms/GVN/PRE/volatile.ll
M llvm/test/Transforms/GVN/condprop.ll
M llvm/test/Transforms/GVN/metadata.ll
Log Message:
-----------
[GVN] Improve PRE on load instructions
This patch implements the enhancement proposed by
https://github.com/llvm/llvm-project/issues/59312.
Suppose we have following code
v0 = load %addr
br %LoadBB
LoadBB:
v1 = load %addr
...
PredBB:
...
br %cond, label %LoadBB, label %SuccBB
SuccBB:
v2 = load %addr
...
Instruction v1 in LoadBB is partially redundant, edge (PredBB, LoadBB) is a
critical edge. SuccBB is another successor of PredBB, it contains another load
v2 which is identical to v1. Current GVN splits the critical edge
(PredBB, LoadBB) and inserts a new load in it. A better method is move the load
of v2 into PredBB, then v1 can be changed to a PHI instruction.
If there are two or more similar predecessors, like the test case in the bug
entry, current GVN simply gives up because otherwise it needs to split multiple
critical edges. But we can move all loads in successor blocks into predecessors.
Differential Revision: https://reviews.llvm.org/D141712
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