[all-commits] [llvm/llvm-project] 9ad938: [LegalizeVectorOps][AArch64][RISCV][X86] Use OpVT ...

Craig Topper via All-commits all-commits at lists.llvm.org
Sat May 13 23:33:35 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9ad9380fbcdc247b139bd4556608616b5f031783
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-05-13 (Sat, 13 May 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/Analysis/CostModel/RISCV/rvv-cmp.ll

  Log Message:
  [LegalizeVectorOps][AArch64][RISCV][X86] Use OpVT for ISD::SETCC in LegalizeVectorOps.

Previously, LegalizeVectorOps used the result VT while LegalizeDAG
used the operand VT. This patch makes them both use the operand VT.

This also makes it consistent with how the default cost model works.

I've hacked the AArch64 cost model to maintain old behavior for some
f16 vectors.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D149572

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