[all-commits] [llvm/llvm-project] 773b0a: [RISCV][CodeGen] Support Zhinx and Zhinxmin

[realqhc via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 773b0aaa49170a97b4de7968c4b6dbc7673aba23
      https://github.com/llvm/llvm-project/commit/773b0aaa49170a97b4de7968c4b6dbc7673aba23
  Author: Qihan Cai <qcai8733 at uni.sydney.edu.au>
  Date:   2023-05-12 (Fri, 12 May 2023)

  Changed paths:
    M llvm/docs/RISCVUsage.rst
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/CodeGen/RISCV/half-arith-strict.ll
    M llvm/test/CodeGen/RISCV/half-arith.ll
    M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
    M llvm/test/CodeGen/RISCV/half-br-fcmp.ll
    M llvm/test/CodeGen/RISCV/half-convert-strict.ll
    M llvm/test/CodeGen/RISCV/half-convert.ll
    M llvm/test/CodeGen/RISCV/half-fcmp-strict.ll
    M llvm/test/CodeGen/RISCV/half-fcmp.ll
    M llvm/test/CodeGen/RISCV/half-frem.ll
    M llvm/test/CodeGen/RISCV/half-imm.ll
    M llvm/test/CodeGen/RISCV/half-intrinsics.ll
    M llvm/test/CodeGen/RISCV/half-isnan.ll
    M llvm/test/CodeGen/RISCV/half-mem.ll
    M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
    M llvm/test/CodeGen/RISCV/half-round-conv.ll
    M llvm/test/CodeGen/RISCV/half-select-fcmp.ll
    M llvm/test/CodeGen/RISCV/half-select-icmp.ll
    M llvm/test/CodeGen/RISCV/rv64zfh-half-convert-strict.ll
    M llvm/test/CodeGen/RISCV/rv64zfh-half-convert.ll
    M llvm/test/CodeGen/RISCV/rv64zfh-half-intrinsics.ll
    M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert-strict.ll
    M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert.ll
    M llvm/test/CodeGen/RISCV/rv64zfhmin-half-intrinsics.ll
    M llvm/test/CodeGen/RISCV/zfh-half-intrinsics-strict.ll
    M llvm/test/CodeGen/RISCV/zfh-half-intrinsics.ll
    M llvm/test/CodeGen/RISCV/zfh-imm.ll
    M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics-strict.ll
    M llvm/test/CodeGen/RISCV/zfhmin-half-intrinsics.ll
    M llvm/test/CodeGen/RISCV/zfhmin-imm.ll

  Log Message:
  -----------
  [RISCV][CodeGen] Support Zhinx and Zhinxmin

This patch was split from D122918.

Co-Author: @liaolucy @sunshaoce

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D149811