[all-commits] [llvm/llvm-project] e5532f: [RISCV] Enable signed truncation check transforms ...

[Yingwei Zheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e5532fb4935b91b5e68dac73e639a567df52f473
      https://github.com/llvm/llvm-project/commit/e5532fb4935b91b5e68dac73e639a567df52f473
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2023-05-10 (Wed, 10 May 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/lack-of-signed-truncation-check.ll
    M llvm/test/CodeGen/RISCV/signed-truncation-check.ll

  Log Message:
  -----------
  [RISCV] Enable signed truncation check transforms for i8

This patch enables signed truncation check transforms for i8 on rv32 when XVT is i64 and Zbb is enabled.

It is a small improvement of D149977.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D150177