[all-commits] [llvm/llvm-project] c501aa: [RISCV][TTI] Model shuffle mask materialization wi...

Philip Reames via All-commits all-commits at lists.llvm.org
Fri May 5 12:26:41 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c501aa88431db19cdda33d8f4d2ada9bf54e336e
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2023-05-05 (Fri, 05 May 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/RISCV/shuffle-interleave.ll
    M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll

  Log Message:
  [RISCV][TTI] Model shuffle mask materialization with correct index type

We were modeling these as if the index type was always e8, but the actual
lowering uses the data type width if legal.  We also weren't accounting for
i64 on xlen32 correctly.

Noticed via inspection while working on the shuffle/buildvec lowering.  Note
that this costing is also wrong in a more major way - we don't actually use
a constant pool load in many cases.  But that's a separate issue.

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