[all-commits] [llvm/llvm-project] d421c5: [RISCV] Directly create MCOperands from addImplySP...
Craig Topper via All-commits
all-commits at lists.llvm.org
Thu May 4 22:19:31 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: d421c5f81acb5933434bec129fdf16321b951fd8
https://github.com/llvm/llvm-project/commit/d421c5f81acb5933434bec129fdf16321b951fd8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-05-04 (Thu, 04 May 2023)
Changed paths:
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
Log Message:
-----------
[RISCV] Directly create MCOperands from addImplySP in Disassembler. NFC
Instead of passing a constant to DecodeGPRRegisterClass, just create
the X2 register directly.
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