[all-commits] [llvm/llvm-project] 74c1fa: [RISCV] Add Smaia and Ssaia extensions support

[Brandon Wu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 74c1fa60b5f5c1d079e08a2e409a649a26da41d1
      https://github.com/llvm/llvm-project/commit/74c1fa60b5f5c1d079e08a2e409a649a26da41d1
  Author: 4vtomat <brandon.wu at sifive.com>
  Date:   2023-05-01 (Mon, 01 May 2023)

  Changed paths:
    M clang/test/Preprocessor/riscv-target-features.c
    M llvm/docs/RISCVUsage.rst
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVSystemOperands.td
    M llvm/test/CodeGen/RISCV/attributes.ll
    M llvm/test/MC/RISCV/attribute-arch.s
    M llvm/test/MC/RISCV/hypervisor-csr-names.s
    M llvm/test/MC/RISCV/machine-csr-names.s
    M llvm/test/MC/RISCV/rv32-hypervisor-csr-names.s
    M llvm/test/MC/RISCV/rv32-machine-csr-names.s
    M llvm/test/MC/RISCV/rv32-only-csr-names.s
    M llvm/test/MC/RISCV/rv32-supervisor-csr-names.s
    M llvm/test/MC/RISCV/rvi-aliases-valid.s
    M llvm/test/MC/RISCV/supervisor-csr-names.s

  Log Message:
  -----------
  [RISCV] Add Smaia and Ssaia extensions support

This patch implements 1.0-RC3:
https://github.com/riscv/riscv-aia/releases/download/1.0-RC3/riscv-interrupts-1.0-RC3.pdf

Differential Revision: https://reviews.llvm.org/D148066