[all-commits] [llvm/llvm-project] 657d20: [RISCV][InsertVSETVLI] Avoid VL toggles for extrac...

Philip Reames via All-commits all-commits at lists.llvm.org
Mon May 1 18:47:12 PDT 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 657d20dc75252f0c8415ada5214affccc3c98efe
      https://github.com/llvm/llvm-project/commit/657d20dc75252f0c8415ada5214affccc3c98efe
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2023-05-01 (Mon, 01 May 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vector-shuffle-reverse.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i-sat.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
    M llvm/test/CodeGen/RISCV/rvv/fold-vector-cmp.ll
    M llvm/test/CodeGen/RISCV/rvv/shuffle-reverse.ll
    M llvm/test/CodeGen/RISCV/rvv/vector-splice.ll
    M llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
    M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll

  Log Message:
  -----------
  [RISCV][InsertVSETVLI] Avoid VL toggles for extractelement patterns

Noticed this while looking at some SLP output. If we have an extractelement, we're probably using a slidedown into an destination with no contents. Given this, we can allow the slideup to use a larger VL and clobber tail elements of the destination vector. Doing this allows us to avoid vsetvli toggles in many fixed length vector examples.

Differential Revision: https://reviews.llvm.org/D148834




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