[all-commits] [llvm/llvm-project] c74aec: [PowerPC] Implement DFP add and sub instructions.

stefanp-ibm via All-commits all-commits at lists.llvm.org
Mon May 1 18:14:05 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c74aec99aafa1183c208d07a6efd04f73ee1fd9d
  Author: Stefan Pintilie <stefanp at ca.ibm.com>
  Date:   2023-05-01 (Mon, 01 May 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
    M llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
    M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
    A llvm/lib/Target/PowerPC/PPCInstrDFP.td
    M llvm/lib/Target/PowerPC/PPCInstrInfo.td
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
    M llvm/lib/Target/PowerPC/PPCRegisterInfo.td
    A llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-dfp.txt
    M llvm/test/MC/PowerPC/invalid-instructions-spellcheck.s
    A llvm/test/MC/PowerPC/ppc64-encoding-dfp.s

  Log Message:
  [PowerPC] Implement DFP add and sub instructions.

Add the following Decimal Floating Point (DFP) instructions for PowerPC.
dadd, daddq, dsub, dsubq

In order to add these instructions a new register class for a pair
of floating point registers is added.

This patch is only to allow the user to specify the instructions in
assembly. There is no scheduling or patterns for the instructions.

Reviewed By: amyk

Differential Revision: https://reviews.llvm.org/D148597

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