[all-commits] [llvm/llvm-project] 34b37c: [M68k] Add instruction selection support for zext ...

[Ian Douglas Scott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 34b37c00abf76fabe3e38f4d5fad49ad46485cd6
      https://github.com/llvm/llvm-project/commit/34b37c00abf76fabe3e38f4d5fad49ad46485cd6
  Author: Ian Douglas Scott <ian at iandouglasscott.com>
  Date:   2023-04-29 (Sat, 29 Apr 2023)

  Changed paths:
    M llvm/lib/Target/M68k/M68kExpandPseudo.cpp
    M llvm/lib/Target/M68k/M68kInstrData.td
    A llvm/test/CodeGen/M68k/load-extend.ll

  Log Message:
  -----------
  [M68k] Add instruction selection support for zext with PCD addressing

Instruction selection was failing when trying to zero extend a value
loaded from a PC-relative address. This adds support for zero extension
using the "program counter indirect with displacement" addressing mode.
It also adds a test with code that was previously failing to compile.

This fixes a compile error in Rust's libcore.

Differential Revision: https://reviews.llvm.org/D149034