[all-commits] [llvm/llvm-project] 7751a9: [AArch64][FastISel] Handle call with multiple retu...
aengelke via All-commits
all-commits at lists.llvm.org
Thu Apr 27 02:59:47 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 7751a91465799d5ff0dc1df5c7d010b16598a0ec
https://github.com/llvm/llvm-project/commit/7751a91465799d5ff0dc1df5c7d010b16598a0ec
Author: Alexis Engelke <engelke at in.tum.de>
Date: 2023-04-27 (Thu, 27 Apr 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
A llvm/test/CodeGen/AArch64/fast-isel-call-struct-return-fallback.ll
A llvm/test/CodeGen/AArch64/fast-isel-call-struct-return.ll
Log Message:
-----------
[AArch64][FastISel] Handle call with multiple return regs
The code closely follows the X86 back-end. Applications that make heavy
use of {i64, i64} returns to use two registers strongly benefit from the
reduced number of SelectionDAG fallbacks.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D148346
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