[all-commits] [llvm/llvm-project] c30c29: [SPARC] Lower BR_CC to BPr on 64-bit target whenev...
Brad Smith via All-commits
all-commits at lists.llvm.org
Wed Apr 26 15:56:22 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: c30c29188770d2981a3dca826768319e1138b124
https://github.com/llvm/llvm-project/commit/c30c29188770d2981a3dca826768319e1138b124
Author: Brad Smith <brad at comstyle.com>
Date: 2023-04-26 (Wed, 26 Apr 2023)
Changed paths:
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.h
M llvm/lib/Target/Sparc/SparcInstr64Bit.td
M llvm/lib/Target/Sparc/SparcInstrAliases.td
M llvm/lib/Target/Sparc/SparcInstrFormats.td
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/test/CodeGen/SPARC/branches-relax.ll
M llvm/test/CodeGen/SPARC/branches-v9.ll
M llvm/test/CodeGen/SPARC/missinglabel.ll
Log Message:
-----------
[SPARC] Lower BR_CC to BPr on 64-bit target whenever possible
On 64-bit target, when doing i64 BR_CC where one of the comparison operands is a
constant zero, try to fold the compare and BPcc into a BPr instruction.
For all integers, EQ and NE comparison are available, additionally for signed
integers, GT, GE, LT, and LE is also available.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D142461
Commit: 92f1156efc5f762ac3a4cc4eebe62742f6d75789
https://github.com/llvm/llvm-project/commit/92f1156efc5f762ac3a4cc4eebe62742f6d75789
Author: Brad Smith <brad at comstyle.com>
Date: 2023-04-26 (Wed, 26 Apr 2023)
Changed paths:
M llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcFixupKinds.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
A llvm/test/MC/Sparc/sparc64-bpr-offset.s
M llvm/test/MC/Sparc/sparc64-ctrl-instructions.s
Log Message:
-----------
[SPARC][MC] Fix encoding of backwards BPr branches
Make sure that the upper bits of the offset is placed in bits 20-21 of the
instruction word.
This fixes the encoding of backwards (negative offset) BPr branches.
(Previously, the upper two bits of the offset would overwrite parts of the rs1
field, causing it to branch on the wrong register, with the wrong offset)
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D144012
Compare: https://github.com/llvm/llvm-project/compare/54e96f4f975e...92f1156efc5f
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