[all-commits] [llvm/llvm-project] 9879e5: [InlineAsm][AArch64]Add backend support for flag o...

[Mingming Liu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9879e5865a8c5429ceaa180f433f1e3140d105ed
      https://github.com/llvm/llvm-project/commit/9879e5865a8c5429ceaa180f433f1e3140d105ed
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2023-04-26 (Wed, 26 Apr 2023)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
    A llvm/test/CodeGen/AArch64/inline-asm-flag-output.ll

  Log Message:
  -----------
  [InlineAsm][AArch64]Add backend support for flag output parameters

- The set of flag is from https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#Flag-Output-Operands

Before:
- ARM64 GCC supports flag output constraints, while Clang doesn't parse condition code, as shown in https://gcc.godbolt.org/z/7jzMEK796
- LLVM ISel won't lower them either (as shown in https://gcc.godbolt.org/z/Pv4PPf56c)

After:
- Given flag output constraints in LLVM IR, condition code is parsed and flag output is lowered to 'cset'.
- Clang parse is not added in this patch.

Differential Revision: https://reviews.llvm.org/D149032