[all-commits] [llvm/llvm-project] 650f04: [mlir][vector] Add pattern to break down vector.bi...

[Quinn Dawkins via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 650f04feda9039e170de513dab261c672fa847cd
      https://github.com/llvm/llvm-project/commit/650f04feda9039e170de513dab261c672fa847cd
  Author: Quinn Dawkins <quinn at nod-labs.com>
  Date:   2023-04-25 (Tue, 25 Apr 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
    M mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
    A mlir/test/Dialect/Vector/vector-break-down-bitcast.mlir
    M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp

  Log Message:
  -----------
  [mlir][vector] Add pattern to break down vector.bitcast

The pattern added here is intended as a last resort for targets like
SPIR-V where there are vector size restrictions and we need to be able
to break down large vector types. Vectorizing loads/stores for small
bitwidths (e.g. i8) relies on bitcasting to a larger element type and
patterns to bubble bitcast ops to where they can cancel.
This fails for cases such as
```
%1 = arith.trunci %0 : vector<2x32xi32> to vector<2x32xi8>
vector.transfer_write %1, %destination[%c0, %c0] {in_bounds = [true, true]} : vector<2x32xi8>, memref<2x32xi8>
```
where the `arith.trunci` op essentially does the job of one of the
bitcasts, leading to a bitcast that need to be further broken down
```
vector.bitcast %0 : vector<16xi8> to vector<4xi32>
```

Differential Revision: https://reviews.llvm.org/D149065