[all-commits] [llvm/llvm-project] 78bb06: [ConstraintElim] Port `mul nuw` for unsigned to `m...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 78bb06b1270c5d266dc080e31a7fed2075b02052
      https://github.com/llvm/llvm-project/commit/78bb06b1270c5d266dc080e31a7fed2075b02052
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2023-04-25 (Tue, 25 Apr 2023)

  Changed paths:
    M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
    M llvm/test/Transforms/ConstraintElimination/mul-nsw.ll

  Log Message:
  -----------
  [ConstraintElim] Port `mul nuw` for unsigned to `mul nsw` to signed.

Add handling for `mul nsw` for signed systems based on the logic for
`mul nuw` for unsigned.