[all-commits] [llvm/llvm-project] c37c9f: [DAG] Restrict (fp_round (copysign X, Y)) -> (copy...

Philip Reames via All-commits all-commits at lists.llvm.org
Tue Apr 18 10:37:53 PDT 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c37c9f2fda27b11cb405dbf458b9128632a75834
      https://github.com/llvm/llvm-project/commit/c37c9f2fda27b11cb405dbf458b9128632a75834
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2023-04-18 (Tue, 18 Apr 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/test/CodeGen/AArch64/sve-fcopysign.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll

  Log Message:
  -----------
  [DAG] Restrict (fp_round (copysign X, Y)) -> (copysign (fp_round X), Y) combine

This transformation creates an copysign node whose argument types do not match. RISCV does not handle such a case which results in a crash today. Looking at the relevant code in DAG, it looks like the process of enabling the non-matching types case was never completed for vectors at all. The transformation which triggered the RISCV crash is a specialization of another transform (specifically due to one use for profitability) which isn't enabled by default. Given that, I chose to match the preconditions for that other transform.

Other options here include:
* Updating RISCV codegen to handle the mismatched argument type case for vectors. This is slightly tricky as I don't see an obvious profitable lowering for this case which doesn't involve simply adding back in the round/trunc.
* Disabling the transform via a target hook.

This patch does involve two changes for AArch64 codegen. These could be called regressions, but well, the code after actually looks better than the code before.

Differential Revision: https://reviews.llvm.org/D148638




More information about the All-commits mailing list