[all-commits] [llvm/llvm-project] 2a5287: [AVR] Fix an issue of writing 16-bit ports
Ben Shi via All-commits
all-commits at lists.llvm.org
Mon Apr 17 00:35:57 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 2a528760bf20004066effcf8f91fedaabd261903
https://github.com/llvm/llvm-project/commit/2a528760bf20004066effcf8f91fedaabd261903
Author: Ben Shi <powerman1st at 163.com>
Date: 2023-04-17 (Mon, 17 Apr 2023)
Changed paths:
M llvm/lib/Target/AVR/AVRDevices.td
M llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRSubtarget.h
M llvm/test/CodeGen/AVR/PR37143.ll
M llvm/test/CodeGen/AVR/alloca.ll
M llvm/test/CodeGen/AVR/atomics/load16.ll
M llvm/test/CodeGen/AVR/atomics/store.ll
M llvm/test/CodeGen/AVR/atomics/store16.ll
M llvm/test/CodeGen/AVR/call.ll
M llvm/test/CodeGen/AVR/dynalloca.ll
M llvm/test/CodeGen/AVR/lpmx.ll
M llvm/test/CodeGen/AVR/pr43443-ctor-alias.ll
M llvm/test/CodeGen/AVR/pseudo/OUTWARr.mir
M llvm/test/CodeGen/AVR/pseudo/STDWPtrQRr.mir
M llvm/test/CodeGen/AVR/pseudo/STSWKRr.mir
M llvm/test/CodeGen/AVR/pseudo/STWPtrRr.mir
M llvm/test/CodeGen/AVR/shift32.ll
M llvm/test/CodeGen/AVR/store.ll
M llvm/test/CodeGen/AVR/struct.ll
M llvm/test/CodeGen/AVR/varargs.ll
Log Message:
-----------
[AVR] Fix an issue of writing 16-bit ports
For 16-bit ports, the normal devices reqiure writing high byte first
and then low byte. But the XMEGA devices require the reverse order.
Fixes https://github.com/llvm/llvm-project/issues/58395
Reviewed By: aykevl, jacquesguan
Differential Revision: https://reviews.llvm.org/D141752
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