[all-commits] [llvm/llvm-project] fc83f1: [AMDGPU] Add backend support for new PAL ELF Metad...

[David Stuttard via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: fc83f1de5d5f6d49de6d62fef6379fb1aab497d3
      https://github.com/llvm/llvm-project/commit/fc83f1de5d5f6d49de6d62fef6379fb1aab497d3
  Author: David Stuttard <david.stuttard at amd.com>
  Date:   2023-04-14 (Fri, 14 Apr 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
    M llvm/lib/Target/AMDGPU/SIProgramInfo.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h
    A llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll

  Log Message:
  -----------
  [AMDGPU] Add backend support for new PAL ELF Metadata 3.0

PAL Metadata 3.0 introduces an explicit structure in metadata for the
programmable registers written out by the compiler backend.
Rather than using opaque registers which can change between different
architectures and requires encoding the bitfield information in the backend,
which may change between versions.

This is the initial minimal implementation that enables the use of PAL Metadata
3.0.

The change itself should be NFC for non-PAL, although the way RSRC2 register is
handled has been changed slightly.

The test is fairly minimal, but checks that the metadata format looks as
expected and verifies a couple of special cases such as tgid_[xyz]_en handling
and PsInputAddr/Ena which also change to explicit fields.

Differential Revision: https://reviews.llvm.org/D147143