[all-commits] [llvm/llvm-project] b9ba05: [AMDGPU] Don't S_MOV_B32 into $scc

[Diana via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b9ba05360e585729458363a53f6cba71d1a8ebb6
      https://github.com/llvm/llvm-project/commit/b9ba05360e585729458363a53f6cba71d1a8ebb6
  Author: Diana Picus <Diana-Magda.Picus at amd.com>
  Date:   2023-04-14 (Fri, 14 Apr 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    R llvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir
    A llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir

  Log Message:
  -----------
  [AMDGPU] Don't S_MOV_B32 into $scc

The peephole optimizer tries to replace
```
%n:sgpr_32 = S_MOV_B32 x
$scc = COPY %n
```
with a `S_MOV_B32` directly into `$scc`.

This crashes because `S_MOV_B32` cannot take `$scc` as input.

We currently generate code like this from GlobalISel when lowering a
G_BRCOND with a constant condition. We should probably look into
removing this kind of branch altogether, but until then we should at
least not crash.

This patch fixes the issue by making sure we don't apply the peephole
optimization when trying to move into a physical register that
doesn't belong to the correct register class.

Differential Revision: https://reviews.llvm.org/D148117