[all-commits] [llvm/llvm-project] 39d7bf: [X86] MatchVectorAllZeroTest - handle icmp_eq(bitc...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 39d7bf6e3468774ede7004d1f7969f4962e8806f
      https://github.com/llvm/llvm-project/commit/39d7bf6e3468774ede7004d1f7969f4962e8806f
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-04-03 (Mon, 03 Apr 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/bitcast-vector-bool.ll

  Log Message:
  -----------
  [X86] MatchVectorAllZeroTest - handle icmp_eq(bitcast(vXi1 trunc(Y)),0) style reduction patterns

If we've truncated from a wider vector, then perform the all vector comparison on that with a suitable mask

There's a minor pre-SSE41 regression due to a missing movmsk(icmp_eq(and(x,c1pow2),c1pow2)) -> movmsk(shl(x,c2)) fold that will be addressed in a followup commit


  Commit: 6865cff8ea8b07d9f2385fd92cecb422404f0f35
      https://github.com/llvm/llvm-project/commit/6865cff8ea8b07d9f2385fd92cecb422404f0f35
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2023-04-03 (Mon, 03 Apr 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/bitcast-vector-bool.ll

  Log Message:
  -----------
  [X86] combineMOVMSK - fold movmsk(icmp_eq(and(x,c1),c1)) -> movmsk(shl(x,c2)) iff pow2splat(c1)

We already have a similar fold for movmsk(icmp_eq(and(x,c1),0)) which we can probably merge this with, but it will involve generalizing a lot of the knownbits code


Compare: https://github.com/llvm/llvm-project/compare/9b5ff4436e44...6865cff8ea8b