[all-commits] [llvm/llvm-project] 5b8ea2: [PowerPC] Lower IS_FPCLASS by test data class inst...

[Qiu Chaofan via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5b8ea2d0e160ff4a30b9bc058e386bd89c1743d2
      https://github.com/llvm/llvm-project/commit/5b8ea2d0e160ff4a30b9bc058e386bd89c1743d2
  Author: Qiu Chaofan <qiucofan at cn.ibm.com>
  Date:   2023-04-03 (Mon, 03 Apr 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
    M llvm/lib/Target/PowerPC/PPCISelLowering.h
    M llvm/test/CodeGen/PowerPC/is_fpclass.ll

  Log Message:
  -----------
  [PowerPC] Lower IS_FPCLASS by test data class instruction

Power ISA 3.0 introduced new 'test data class' instructions, which
accept flags for: NaN/Infinity/Zero/Denormal. This instruction can be
used to implement custom lowering for llvm.is.fpclass, but some extra
bits provided by the intrinsic are missing (normal and QNaN/SNaN).

For those categories not natively supported, this patch uses a two-way
or three-way combination to implement correct behavior.

Reviewed By: sepavloff, shchenz

Differential Revision: https://reviews.llvm.org/D140381