[all-commits] [llvm/llvm-project] effb7a: [TwoAddressInstruction] Improve tests for register...
Jay Foad via All-commits
all-commits at lists.llvm.org
Thu Mar 30 11:20:17 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: effb7ab6c24c997b10f2555b8b860b9a09673c0f
https://github.com/llvm/llvm-project/commit/effb7ab6c24c997b10f2555b8b860b9a09673c0f
Author: Jay Foad <jay.foad at amd.com>
Date: 2023-03-30 (Thu, 30 Mar 2023)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-limit-duplane.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-limit-duplane.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AVR/shift32.ll
M llvm/test/CodeGen/X86/pr32284.ll
Log Message:
-----------
[TwoAddressInstruction] Improve tests for register killed by instruction
Define and use a MachineOperand overload of isPlainlyKilled. This
improves codegen in a couple of tests because it catches the case where
MO does not kill Reg but another operand of the same instruction does.
Differential Revision: https://reviews.llvm.org/D147167
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