[all-commits] [llvm/llvm-project] cd67bb: [MLIR][Affine] add memory effect traits for dmaOp
long.chen via All-commits
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Sat Mar 25 18:10:56 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: cd67bbdc2496fbba68c818c6ff82007d89d2bb40
https://github.com/llvm/llvm-project/commit/cd67bbdc2496fbba68c818c6ff82007d89d2bb40
Author: lipracer <lipracer at gmail.com>
Date: 2023-03-26 (Sun, 26 Mar 2023)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.h
M mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
Log Message:
-----------
[MLIR][Affine] add memory effect traits for dmaOp
DmaOp will read the source buffer and write the destination buffer so need to add some traits for it.
Reviewed By: bondhugula
Differential Revision: https://reviews.llvm.org/D144712
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