[all-commits] [llvm/llvm-project] 8a8082: [libunwind][PowerPC] Fix saving/restoring VSX regi...

Fri Mar 24 00:45:19 PDT 2023

  Branch: refs/heads/release/16.x
  Home:   https://github.com/llvm/llvm-project
  Commit: 8a80823218a872434acadabae5d6c850768ba827
      https://github.com/llvm/llvm-project/commit/8a80823218a872434acadabae5d6c850768ba827
  Author: Nemanja Ivanovic <nemanja.i.ibm at gmail.com>
  Date:   2023-03-24 (Fri, 24 Mar 2023)

  Changed paths:
    A libcxxabi/test/vendor/ibm/vec_reg_restore-le.pass.cpp
    M libunwind/src/UnwindRegistersRestore.S
    M libunwind/src/UnwindRegistersSave.S

  Log Message:
  -----------
  [libunwind][PowerPC] Fix saving/restoring VSX registers on LE systems

Currently, libunwind just uses stxvd2x/lxvd2x to save/restore
VSX registers respectively. This puts the registers in
doubleword-reversed order into memory on little endian systems.
If both the save and restore are done the same way, this
isn't a problem. However if the unwinder is just restoring
a callee-saved register, it will restore it in the wrong
order (since function prologues save them in the correct order).
This patch adds the necessary swaps before the saves and after
the restores.

Differential revision: https://reviews.llvm.org/D137599

(cherry picked from commit 372820bf571c8d32c8165cfc74b0439c7bb397f9)

  Commit: 99af55f91f5de627b135c6e1af133275ddd6ffd0
      https://github.com/llvm/llvm-project/commit/99af55f91f5de627b135c6e1af133275ddd6ffd0
  Author: Konstantin Varlamov <varconst at apple.com>
  Date:   2023-03-24 (Fri, 24 Mar 2023)

  Changed paths:
    M libcxx/test/support/format.functions.common.h

  Log Message:
  -----------
  [libc++][format] Fix a missing include in tests.

(cherry picked from commit 78f17b2a98e9c7ce4a28c48955ef312157099a69)

  Commit: 6dc69d034845b3b511b95746badf36ffe83163c8
      https://github.com/llvm/llvm-project/commit/6dc69d034845b3b511b95746badf36ffe83163c8
  Author: Konstantin Varlamov <varconst at apple.com>
  Date:   2023-03-24 (Fri, 24 Mar 2023)

  Changed paths:
    M libcxx/test/std/ranges/range.adaptors/range.elements/sentinel/minus.pass.cpp

  Log Message:
  -----------
  [libc++][ranges] Fix incorrect integer typedef in `elements_view` test.

Differential Revision: https://reviews.llvm.org/D142951

(cherry picked from commit 3fe3f9c51cbac91af741e53e96c89f633bd2a6ad)

  Commit: 867c59c2da1791fcdfd51a750202b3c8c2b4e7ad
      https://github.com/llvm/llvm-project/commit/867c59c2da1791fcdfd51a750202b3c8c2b4e7ad
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2023-03-24 (Fri, 24 Mar 2023)

  Changed paths:
    M clang/lib/Sema/SemaCoroutine.cpp
    M clang/test/SemaCXX/coroutine-dealloc.cpp

  Log Message:
  -----------
  [Coroutines] Pass size parameter for deallocation function when qualified

Close https://github.com/llvm/llvm-project/issues/60545.

Previously, we would only pass the size parameter to the deallocation
function if the type is completely the same. But it is good enough to
make them unqualified the smae.

(cherry picked from commit d2b0b26132ce5d3d9022edbf274f01e9de764673)

  Commit: 32b8cc7031f01252fa817f3ec30c709d6eedbf73
      https://github.com/llvm/llvm-project/commit/32b8cc7031f01252fa817f3ec30c709d6eedbf73
  Author: Vladislav Khmelevsky <och95 at yandex.ru>
  Date:   2023-03-24 (Fri, 24 Mar 2023)

  Changed paths:
    M bolt/include/bolt/Core/Relocation.h
    M bolt/lib/Core/BinarySection.cpp
    M bolt/lib/Core/Relocation.cpp

  Log Message:
  -----------
  [BOLT] Fix data reoder for aarch64

Use proper relocation for aarch64

Differential Revision: https://reviews.llvm.org/D144095

  Commit: 14ed120b230719b2d626666cca8d293d902268b9
      https://github.com/llvm/llvm-project/commit/14ed120b230719b2d626666cca8d293d902268b9
  Author: Aaron Ballman <aaron at aaronballman.com>
  Date:   2023-03-24 (Fri, 24 Mar 2023)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/DiagnosticParseKinds.td
    M clang/test/Parser/cxx2b-lambdas-ext-warns.cpp

  Log Message:
  -----------
  No longer issue static lambda pedantic warning for pre-c++2b compat

We were accidentally issuing "static lambdas are incompatible with C++
standards before C++2b" with -pedantic because it was an ExtWarn
diagnostic rather than a Warning. This corrects the diagnostic category
and adds some test coverage.

Fixes #61582

(cherry picked from commit b904e68f13ba7d4f4aa86a3495e2441c99247671)

  Commit: 0b4106274631c04dc10cabf802138a286a8f9ea8
      https://github.com/llvm/llvm-project/commit/0b4106274631c04dc10cabf802138a286a8f9ea8
  Author: Job Noorman <jnoorman at igalia.com>
  Date:   2023-03-24 (Fri, 24 Mar 2023)

  Changed paths:
    M bolt/lib/Rewrite/RewriteInstance.cpp
    A bolt/test/X86/section-end-sym.s

  Log Message:
  -----------
  [BOLT] Reject symbols pointing to section end

Sometimes, symbols are present that point to the end of a section (i.e.,
one-past the highest valid address). Currently, BOLT either rejects
those symbols when they don't point to another existing section, or errs
when they do and the other section is not executable. I suppose BOLT
would accept the symbol when it points to an executable section.

In any case, these symbols should not be considered while discovering
functions and should not result in an error. This patch implements that.

Note that this patch checks explicitly for symbols whose value equals
the end of their section. It might make more sense to verify that the
symbol's value is within [section start, section end). However, I'm not
sure if this could every happen *and* its value does not equal the end.

Another way to implement this is to verify that the BinarySection we
find at the symbol's address actually corresponds to the symbol's
section. I'm not sure what the best approach is so feedback is welcome.

Reviewed By: yota9, rafauler

Differential Revision: https://reviews.llvm.org/D146215

(cherry picked from commit 54ab9541492d808ae4cf9130dd052d602b78ee32)

  Commit: 1f9ea2d3f045c270c2be1d9f9c2884d49577ce64
      https://github.com/llvm/llvm-project/commit/1f9ea2d3f045c270c2be1d9f9c2884d49577ce64
  Author: Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian at amd.com>
  Date:   2023-03-24 (Fri, 24 Mar 2023)

  Changed paths:
    M llvm/lib/Target/X86/X86.td
    M llvm/lib/Target/X86/X86PfmCounters.td
    A llvm/lib/Target/X86/X86ScheduleZnver4.td
    A llvm/test/tools/llvm-mca/X86/Znver4/independent-load-stores.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-adx.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-aes.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx1.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx2.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bitalg.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bitalgvl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bw.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512bwvl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512cd.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512cdvl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512dq.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512dqvl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512gfni.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512gfnivl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512ifma.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512ifmavl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vaes.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vaesvl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vbmi.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vbmi2.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vbmi2vl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vbmivl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vnni.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vnnivl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vp2intersect.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vp2intersectvl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vpclmulqdq.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vpclmulqdqvl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vpopcntdq.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avx512vpopcntdqvl.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avxgfni.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-avxvnni.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-bmi1.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-bmi2.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-clflushopt.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-clwb.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-cmov.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-cmpxchg.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-f16c.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-fma.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-fsgsbase.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-gfni.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-lea.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-lzcnt.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-mmx.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-movbe.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-pclmul.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-popcnt.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-prefetchw.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-rdrand.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-rdseed.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-sse1.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-sse2.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-sse3.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-sse41.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-sse42.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-ssse3.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-vaes.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-vpclmulqdq.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-x86_32.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-x86_64.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-x87.s
    A llvm/test/tools/llvm-mca/X86/Znver4/resources-xsave.s
    A llvm/test/tools/llvm-mca/X86/Znver4/zero-idioms.s
    M llvm/test/tools/llvm-mca/X86/cpus.s
    M llvm/test/tools/llvm-mca/X86/read-after-ld-1.s
    M llvm/test/tools/llvm-mca/X86/register-file-statistics.s
    M llvm/test/tools/llvm-mca/X86/scheduler-queue-usage.s

  Log Message:
  -----------
  [X86] AMD Genoa (znver4) Scheduler model update

(cherry picked from commit ffdd5a330c05fa2b4339f64402f650df068c5767)

Compare: https://github.com/llvm/llvm-project/compare/c5b23ab2a31a...1f9ea2d3f045