[all-commits] [llvm/llvm-project] c39dd7: [RISCV][MC] Add support for RV64E

[Job Noorman via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c39dd7c1db97fa367cb6282067b74cd8e55ef09a
      https://github.com/llvm/llvm-project/commit/c39dd7c1db97fa367cb6282067b74cd8e55ef09a
  Author: Job Noorman <jnoorman at igalia.com>
  Date:   2023-03-23 (Thu, 23 Mar 2023)

  Changed paths:
    M clang/test/Driver/riscv-arch.c
    M clang/test/Driver/riscv-features.c
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    R llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
    R llvm/test/CodeGen/RISCV/rv32e.ll
    A llvm/test/CodeGen/RISCV/rve.ll
    M llvm/test/MC/RISCV/attribute-arch.s
    M llvm/test/MC/RISCV/elf-flags.s
    M llvm/test/MC/RISCV/invalid-attribute.s
    R llvm/test/MC/RISCV/mattr-invalid-combination.s
    M llvm/test/MC/RISCV/rv32e-invalid.s
    M llvm/test/MC/RISCV/rv32e-valid.s
    A llvm/test/MC/RISCV/rv64e-valid.s
    M llvm/test/MC/RISCV/target-abi-invalid.s
    M llvm/test/MC/RISCV/target-abi-valid.s
    M llvm/unittests/Support/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV][MC] Add support for RV64E

Implement MC support for the recently ratified RV64E base instruction
set.

Differential Revision: https://reviews.llvm.org/D143570