[all-commits] [llvm/llvm-project] 71d97d: [MLIR][Affine] Fix addInductionVarOrTerminalSymbol

[Uday Bondhugula via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 71d97df6afc4a8b65c145f835f51dccd624772c7
      https://github.com/llvm/llvm-project/commit/71d97df6afc4a8b65c145f835f51dccd624772c7
  Author: Uday Bondhugula <uday at polymagelabs.com>
  Date:   2023-03-21 (Tue, 21 Mar 2023)

  Changed paths:
    M mlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
    M mlir/test/Dialect/Affine/affine-data-copy.mlir

  Log Message:
  -----------
  [MLIR][Affine] Fix addInductionVarOrTerminalSymbol

Update affine analysis method `addInductionVarOrTerminalSymbol` for
affine.parallel IV.

Fixes https://github.com/llvm/llvm-project/issues/61371

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D146493