[all-commits] [llvm/llvm-project] 9356ec: CodeGen: Reorder case handling for is.fpclass lega...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9356ec1516cae84837629ef19b7158c0e1155852
      https://github.com/llvm/llvm-project/commit/9356ec1516cae84837629ef19b7158c0e1155852
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-03-17 (Fri, 17 Mar 2023)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
    M llvm/test/CodeGen/X86/is_fpclass.ll

  Log Message:
  -----------
  CodeGen: Reorder case handling for is.fpclass legalization

Subnormal and zero checks can be combined into one, so move
the code closer to reduce the diff in a future change.


  Commit: b5ff7640cd1391ebe67e47a043fed6faf8bdcbb7
      https://github.com/llvm/llvm-project/commit/b5ff7640cd1391ebe67e47a043fed6faf8bdcbb7
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2023-03-17 (Fri, 17 Mar 2023)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Transforms/InstCombine/combine-is.fpclass-and-fcmp.ll
    M llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
    M llvm/test/Transforms/InstCombine/is_fpclass.ll

  Log Message:
  -----------
  InstCombine: Fold is.fpclass nan|zero to fcmp ueq 0


Compare: https://github.com/llvm/llvm-project/compare/0eac3c500406...b5ff7640cd13