[all-commits] [llvm/llvm-project] a9d961: [RISCV][NFC] Share interleave mask checking logic

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a9d9616c0de3f07654ee139bead48b8d78f44e1f
      https://github.com/llvm/llvm-project/commit/a9d9616c0de3f07654ee139bead48b8d78f44e1f
  Author: Luke Lau <luke at igalia.com>
  Date:   2023-03-14 (Tue, 14 Mar 2023)

  Changed paths:
    M llvm/include/llvm/IR/Instructions.h
    M llvm/lib/CodeGen/InterleavedAccessPass.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/RISCV/shuffle-interleave.ll
    M llvm/unittests/IR/ShuffleVectorInstTest.cpp

  Log Message:
  -----------
  [RISCV][NFC] Share interleave mask checking logic

This adds two new methods to ShuffleVectorInst, isInterleave and
isInterleaveMask, so that the logic to check if a shuffle mask is an
interleave can be shared across the TTI, codegen and the interleaved
access pass.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D145971