[all-commits] [llvm/llvm-project] 405824: [RISCV] Add overrides of isLoadFromStackSlot/isSto...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 40582493f06375f0b8199626cdd690aab608f5ae
      https://github.com/llvm/llvm-project/commit/40582493f06375f0b8199626cdd690aab608f5ae
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-03-12 (Sun, 12 Mar 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.h

  Log Message:
  -----------
  [RISCV] Add overrides of isLoadFromStackSlot/isStoreFromStackSlot signatures that don't have MemBytes.

D145471 added overrides of the other signature to return MemBytes,
but shouldn't have removed these overrides.

These signatures will now call the MemBytes signature and ignore
the MemBytes. This matches X86.