[all-commits] [llvm/llvm-project] 3b3a4c: Revert "[SLP]Initial support for reshuffling of no...

[Hans via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3b3a4c270bcbc12c957c941c8ee2a7bfea0fa673
      https://github.com/llvm/llvm-project/commit/3b3a4c270bcbc12c957c941c8ee2a7bfea0fa673
  Author: Hans Wennborg <hans at chromium.org>
  Date:   2023-03-10 (Fri, 10 Mar 2023)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/crash_extract_subvector_cost.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/phi-result-use-order.ll
    M llvm/test/Transforms/SLPVectorizer/X86/PR35865-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/PR35865.ll
    M llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-cast.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-fp.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-int-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-fp-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/arith-fp.ll
    M llvm/test/Transforms/SLPVectorizer/X86/crash_exceed_scheduling.ll
    M llvm/test/Transforms/SLPVectorizer/X86/crash_smallpt.ll
    M llvm/test/Transforms/SLPVectorizer/X86/extract-shuffle-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/extract-shuffle.ll
    M llvm/test/Transforms/SLPVectorizer/X86/extract.ll
    M llvm/test/Transforms/SLPVectorizer/X86/extractelement-multiple-uses.ll
    M llvm/test/Transforms/SLPVectorizer/X86/extractelement.ll
    M llvm/test/Transforms/SLPVectorizer/X86/gather-extractelements-different-bbs.ll
    M llvm/test/Transforms/SLPVectorizer/X86/hadd-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/hadd.ll
    M llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector-const-undef.ll
    M llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector.ll
    M llvm/test/Transforms/SLPVectorizer/X86/insertelement-postpone.ll
    M llvm/test/Transforms/SLPVectorizer/X86/landing_pad.ll
    M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
    M llvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
    M llvm/test/Transforms/SLPVectorizer/X86/odd_store.ll
    M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
    M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
    M llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reduction-same-vals.ll
    M llvm/test/Transforms/SLPVectorizer/X86/remark_extract_broadcast.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reused-scalars-in-buildvector.ll
    M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reused-pointer.ll
    M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
    M llvm/test/Transforms/SLPVectorizer/X86/vectorize-widest-phis.ll

  Log Message:
  -----------
  Revert "[SLP]Initial support for reshuffling of non-starting buildvector/gather nodes."

This caused verifier errors:

  Instruction does not dominate all uses!
    %8 = insertelement <2 x i64> %7, i64 %pgocount1330, i64 1
    %15 = shufflevector <2 x i64> %8, <2 x i64> poison, <2 x i32> <i32 1, i32 1>
  in function ?NearestInclusiveAncestorAssignedToSlot at SlotScopedTraversal@blink@@SAPAVElement at 2@ABV32@@Z

(or register allocator crash when the verifier was disabled).

See comment on the code review.

> Previously only the very first gather/buildvector node might be probed for reshuffling of other nodes.
> But the compiler may do the same for other gather/buildvector nodes too, just need to check the
> dependency and postpone the emission of the dependent nodes, if the origin nodes were not emitted yet.
>
> Part of D110978
>
> Differential Revision: https://reviews.llvm.org/D144958

This reverts commit a611b3f3059e4c3b9e7b914091c3edaef099fd5d.
It also reverts 7a4061ae372b3262703ffeea3b64db89187db611 which depended on the above.