[all-commits] [llvm/llvm-project] f2c1b1: [RISCV] Add test case for Zfa fli.s miscompile. NFC

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f2c1b1a7f54ee74018d369f449a26e3d0cce5806
      https://github.com/llvm/llvm-project/commit/f2c1b1a7f54ee74018d369f449a26e3d0cce5806
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-03-07 (Tue, 07 Mar 2023)

  Changed paths:
    M llvm/test/CodeGen/RISCV/float-zfa.ll

  Log Message:
  -----------
  [RISCV] Add test case for Zfa fli.s miscompile. NFC

The f32 matching code for fli was hacked to allow the f16 minimum value
to match for the fli.h instruction in the assembler. This was done
because the assembler parses the floating point literal for fli.h,
fli.s, and fli.d as a single precision value.

Unfortunately, this function is also used by CodeGen and causes
this value to be miscompiled for f32.