[all-commits] [llvm/llvm-project] 8fa1e5: [RISCV] Teach performCombineVMergeAndVOps to combi...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8fa1e5e673f9b13ec3d060975c01b07e827f16dc
      https://github.com/llvm/llvm-project/commit/8fa1e5e673f9b13ec3d060975c01b07e827f16dc
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-03-07 (Tue, 07 Mar 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    A llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-masked-vops.ll

  Log Message:
  -----------
  [RISCV] Teach performCombineVMergeAndVOps to combine unmasked TU vpmerge with a masked MU TA op.

We can form a MU TU operation and remove the merge if they use the
same merge value.

My primary interest was a case involving VP intrinsics from our downstream,
but it requires another optimization that isn't in upstream yet. So I've used
RVV intrinsics to get the desired instructions.

Co-authored-by: Nitin John Raj <nitin.raj at sifive.com>

Reviewed By: fakepaper56

Differential Revision: https://reviews.llvm.org/D145272