[all-commits] [llvm/llvm-project] 606a62: AMDGPU: Force sign operand of f64 fcopysign to f32
Matt Arsenault via All-commits
all-commits at lists.llvm.org
Sun Mar 5 15:54:27 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 606a62ce27e602cfc12381dd9d1ec2d065aa075e
https://github.com/llvm/llvm-project/commit/606a62ce27e602cfc12381dd9d1ec2d065aa075e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2023-03-05 (Sun, 05 Mar 2023)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
Log Message:
-----------
AMDGPU: Force sign operand of f64 fcopysign to f32
The fcopysign DAG operation, unlike the IR one, allows
different types for the sign and magnitude. We can reduce
the bitwidth of the high operand since only the sign bit matters.
The default combine only introduces mixed fcopysign
operand types from fpext/fptrunc. We effectively do this
already during selection, but doing it earlier in the combiner
should expose new combine opportunities (e.g. the existing tests
now eliminate the load of the low half of the double). Unfortunately
this isn't enough to handle the case I'm interested in just yet.
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