[all-commits] [llvm/llvm-project] 170e7a: [AArch64][SME2] Add CodeGen support for target("aa...

[sdesmalen-arm via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 170e7a0ec2e6d29cb642ece0bf34f395453d5e68
      https://github.com/llvm/llvm-project/commit/170e7a0ec2e6d29cb642ece0bf34f395453d5e68
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2023-03-02 (Thu, 02 Mar 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/ValueTypes.h
    M llvm/include/llvm/CodeGen/ValueTypes.td
    M llvm/include/llvm/IR/Type.h
    M llvm/include/llvm/Support/MachineValueType.h
    M llvm/lib/Analysis/Loads.cpp
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/LowLevelType.cpp
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/ValueTypes.cpp
    M llvm/lib/IR/Type.cpp
    M llvm/lib/Support/LowLevelType.cpp
    M llvm/lib/Target/AArch64/AArch64CallingConvention.td
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
    A llvm/test/CodeGen/AArch64/sme-aarch64-svcount-O3.ll
    A llvm/test/CodeGen/AArch64/sme-aarch64-svcount.ll
    M llvm/utils/TableGen/CodeGenTarget.cpp

  Log Message:
  -----------
  [AArch64][SME2] Add CodeGen support for target("aarch64.svcount").

This patch adds AArch64 CodeGen support such that the type can be passed
and returned to/from functions, and also adds support to use this type in
load/store operations and PHI nodes.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D136862