[all-commits] [llvm/llvm-project] cb96eb: [IR][Legalization] Split illegal deinterleave and ...

[CarolineConcatto via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cb96eba27cd18ecf8041bf1b9a5c7e197f7a2749
      https://github.com/llvm/llvm-project/commit/cb96eba27cd18ecf8041bf1b9a5c7e197f7a2749
  Author: Caroline Concatto <caroline.concatto at arm.com>
  Date:   2023-03-01 (Wed, 01 Mar 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/AArch64/sve-vector-deinterleave.ll
    M llvm/test/CodeGen/AArch64/sve-vector-interleave.ll

  Log Message:
  -----------
  [IR][Legalization] Split illegal deinterleave and interleave vectors

To make legalization easier, the operands and outputs have the same size for
these ISD Nodes. When legalizing the results in SplitVectorResult the operands
are legalized to the same size as the outputs.
The ISD Node has two output/results, therefore the legalizing functions update
both results/outputs.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D144744