[all-commits] [llvm/llvm-project] 3b090f: [InstCombine] use demanded vector elements to elim...

[Sanjay Patel via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3b090ff2bdb2828b53d6fec9c06b9d52fed09f42
      https://github.com/llvm/llvm-project/commit/3b090ff2bdb2828b53d6fec9c06b9d52fed09f42
  Author: Sanjay Patel <spatel at rotateright.com>
  Date:   2023-02-28 (Tue, 28 Feb 2023)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll

  Log Message:
  -----------
  [InstCombine] use demanded vector elements to eliminate partially redundant instructions

In issue #60632, we have vector math ops that differ because an
operand is shuffled, but the math has limited demanded elements,
so it can be replaced by another instruction:
https://alive2.llvm.org/ce/z/TKqq7H

I don't think we have anything like this yet - it's like a
CSE/GVN fold, but driven by demanded elements of a vector op.
This is limited to splat-0 as a first step to keep it simple.

Differential Revision: https://reviews.llvm.org/D144760