[all-commits] [llvm/llvm-project] f5b484: [RISCV] Add vendor-defined XTheadCmo (Cache Manage...

[Philipp Tomsich via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f5b484c56f7b0bbf265c06de70ed0c432543847f
      https://github.com/llvm/llvm-project/commit/f5b484c56f7b0bbf265c06de70ed0c432543847f
  Author: Manolis Tsamis <manolis.tsamis at vrull.eu>
  Date:   2023-02-22 (Wed, 22 Feb 2023)

  Changed paths:
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
    M llvm/test/CodeGen/RISCV/attributes.ll
    A llvm/test/MC/RISCV/xtheadcmo-invalid.s
    A llvm/test/MC/RISCV/xtheadcmo-valid.s

  Log Message:
  -----------
  [RISCV] Add vendor-defined XTheadCmo (Cache Management Operations) extension

The vendor-defined XTHeadCmo (there are some similarities with the
Zicbom standard extension) extension adds cache management instructions.

It is supported by the C9xx cores (e.g., found in the wild in the
Allwinner D1) by Alibaba T-Head.

The current (as of this commit) public documentation for this
extension is available at:
  https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.2.2/xthead-2023-01-30-2.2.2.pdf

Support for these instructions has already landed in GNU Binutils:
  https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=a9ba8bc2d396fb8ae2b892f3bc6be8cdfe4b555c

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D144496