[all-commits] [llvm/llvm-project] b48624: [RISCV] Use a smaller VL when interleaving fixed v...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b486246135e94e5491e0a7c6f3ec718d32104392
      https://github.com/llvm/llvm-project/commit/b486246135e94e5491e0a7c6f3ec718d32104392
  Author: Luke Lau <luke at igalia.com>
  Date:   2023-02-21 (Tue, 21 Feb 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/common-shuffle-patterns.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
    M llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll

  Log Message:
  -----------
  [RISCV] Use a smaller VL when interleaving fixed vectors

Interleaves generated with vwaddu.vv and vwmaccu.vx were using VLs that
were twice the number of elements actually needed in the vector.
This also pulls the interleaving logic out into its own function so it
can be reused by later patches, and adapts it for scalable vectors.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D144386