[all-commits] [llvm/llvm-project] 7f31a5: [RISCV] Add fgtq.s and fgeq.s assembler aliases fo...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7f31a5c4c647ecdca010072f547f30f77ed1ab3e
      https://github.com/llvm/llvm-project/commit/7f31a5c4c647ecdca010072f547f30f77ed1ab3e
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-02-19 (Sun, 19 Feb 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
    M llvm/test/MC/RISCV/zfa-valid.s

  Log Message:
  -----------
  [RISCV] Add fgtq.s and fgeq.s assembler aliases for Zfa.

We can swap operands and use fltq.s and fleq.s. Similar for D and H.