[all-commits] [llvm/llvm-project] c0947d: [RISCV][MC] Add support for experimental zfa exten...

joshua-arch1 via All-commits all-commits at lists.llvm.org
Fri Feb 17 09:34:55 PST 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c0947dc44109252fcc0f68a542fc6ef250d4d3a9
  Author: Jun Sha (Joshua) <cooper.joshua at linux.alibaba.com>
  Date:   2023-02-17 (Fri, 17 Feb 2023)

  Changed paths:
    M llvm/docs/RISCVUsage.rst
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    A llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
    A llvm/test/MC/RISCV/rv32zfa-only-valid.s
    A llvm/test/MC/RISCV/zfa-double-invalid.s
    A llvm/test/MC/RISCV/zfa-half-invalid.s
    A llvm/test/MC/RISCV/zfa-invalid.s
    A llvm/test/MC/RISCV/zfa-valid.s

  Log Message:
  [RISCV][MC] Add support for experimental zfa extension (FLI instruction not included) (try 3)

(Opening comment by preames - submitter, not patch author)

Try 1 was reverted because it had been landed in pieces, none of which had a meaningful commit message.

Try 2 was reverted because of a buildbot failure.  It turns out this was a spurious revert on my (preames) part.  The buildbots were failing, and it was from one of my changes in this sequence, but not the recommit.  I had reverted both of the try 1 commits in a single git push, but in separate *commits*.  Some of the builders decided to build the broken state between the original try 1 commit, and I'd not noticed that.  I'd assumed the breakage was because of the try2 re-commit.  So the revert of the try 2 recommit was spurious.

Original commit message:

This implements experimental support for the RISCV Zfa extension as specified here: https://github.com/riscv/riscv-isa-manual/releases/download/draft-20221119-5234c63/riscv-spec.pdf, Ch. 25. This extension has not been ratified. Once ratified, it'll move out of experimental status.

This change adds assembly support for all instructions except load-immediate instructions (fli.s/fli.d/fli.h).  Assembly support for that instruction and codegen support will follow in separate patches.

Differential Revision: https://reviews.llvm.org/D141984

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