[all-commits] [llvm/llvm-project] d4012b: [RISCV] Add vendor-defined XTheadMAC (multiply-acc...

[Philipp Tomsich via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d4012bc43f9a752d77f464286d91f72f4c6970ee
      https://github.com/llvm/llvm-project/commit/d4012bc43f9a752d77f464286d91f72f4c6970ee
  Author: Manolis Tsamis <manolis.tsamis at vrull.eu>
  Date:   2023-02-14 (Tue, 14 Feb 2023)

  Changed paths:
    M llvm/docs/RISCVUsage.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/lib/Support/RISCVISAInfo.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
    M llvm/test/CodeGen/RISCV/attributes.ll
    A llvm/test/CodeGen/RISCV/xtheadmac.ll
    A llvm/test/MC/RISCV/rv32xtheadmac-invalid.s
    A llvm/test/MC/RISCV/rv32xtheadmac-valid.s
    A llvm/test/MC/RISCV/rv64xtheadmac-valid.s
    A llvm/test/MC/RISCV/xtheadmac-invalid.s

  Log Message:
  -----------
  [RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension

The vendor-defined XTHeadMAC (no comparable standard extension exists
at the time of writing) extension adds multiply accumulate instructions.

It is supported by the C9xx cores (e.g., found in the wild in the
Allwinner D1) by Alibaba T-Head.

The current (as of this commit) public documentation for this
extension is available at:
  https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.2.2/xthead-2023-01-30-2.2.2.pdf

Support for these instructions has already landed in GNU Binutils:
  https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=4041e11db3ec3611921d10150572a92689aa3154

Co-authored-by: Philipp Tomsich <philipp.tomsich at vrull.eu>

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D143847