[all-commits] [llvm/llvm-project] 14dedd: [Reland][LSR] Hoist IVInc to loop header if its al...

[chenglin.bi via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 14dedd9cf596d1e6cfd8d24009393e8b8f1a3dc0
      https://github.com/llvm/llvm-project/commit/14dedd9cf596d1e6cfd8d24009393e8b8f1a3dc0
  Author: chenglin.bi <chenglin.bi at linaro.org>
  Date:   2023-02-10 (Fri, 10 Feb 2023)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
    M llvm/test/Transforms/LoopStrengthReduce/AArch64/pr53625.ll

  Log Message:
  -----------
  [Reland][LSR] Hoist IVInc to loop header if its all uses are in the loop header

Original code will cause crash when the load/store memory type is structure because isIndexedLoadLegal/isIndexedStore doesn't support struct type.
So we limit the load/store memory type to integer.

Origin commit message:
When the latch block is different from header block, IVInc will be expanded in the latch loop. We can't generate the post index load/store this case.
But if the IVInc only used in the loop, actually we still can use the post index load/store because when exit loop we don't care the last IVInc value.
So, trying to hoist IVInc to help backend to generate more post index load/store.

Fix #53625

Reviewed By: eopXD

Differential Revision: https://reviews.llvm.org/D138636