[all-commits] [llvm/llvm-project] b1c4ce: [SVE] Add intrinsics for logical/bitwise operation...

[lizhijin1024 via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b1c4ceccf993cd00b8c32cc2720e08694355bd4a
      https://github.com/llvm/llvm-project/commit/b1c4ceccf993cd00b8c32cc2720e08694355bd4a
  Author: lizhijin <lizhijin3 at huawei.com>
  Date:   2023-02-10 (Fri, 10 Feb 2023)

  Changed paths:
    M clang/include/clang/Basic/arm_sve.td
    M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c
    M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c
    M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c
    M clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c
    M llvm/include/llvm/IR/IntrinsicsAArch64.td
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/sve-intrinsics-logical-undef.ll

  Log Message:
  -----------
  [SVE] Add intrinsics for logical/bitwise operations that explicitly undefine the result for inactive lanes

This patch adds new intrinsics for logical/bitwise operations and
changes the lowering for the following builtins to emit calls to
the new aarch64.sve.###.u intrinsics.
  svand_x
  svand_n_x
  svorr_x
  svorr_n_x
  sveor_x
  sveor_n_x
  svbic_x
  svbic_n_x

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D143499