[all-commits] [llvm/llvm-project] 079c48: [TTI][AArch64] Cost model insertelement and indexe...

[sjoerdmeijer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 079c488c66056f7bf22c30ee280489f6c43b7658
      https://github.com/llvm/llvm-project/commit/079c488c66056f7bf22c30ee280489f6c43b7658
  Author: Sjoerd Meijer <smeijer at nvidia.com>
  Date:   2023-02-09 (Thu, 09 Feb 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
    M llvm/test/Analysis/CostModel/AArch64/insert-extract.ll

  Log Message:
  -----------
  [TTI][AArch64] Cost model insertelement and indexed LD1 instructions

An indexed LD1 instruction, or "ASIMD load, 1 element, one lane, B/H/S"
instruction that loads a value and inserts an element into a vector is
an expensive instruction. It has a latency of 8 on modern cores. We
generate an indexed LD1 when an insertelement instruction has a load as an
operand and this patch is recognising and makes indexed LD1 more expensive.

Differential Revision: https://reviews.llvm.org/D141602