[all-commits] [llvm/llvm-project] 361995: [AArch64] Protect against overflowing shift amount...

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 361995cf985d8eca06cbd877c6dae88989f7ba82
      https://github.com/llvm/llvm-project/commit/361995cf985d8eca06cbd877c6dae88989f7ba82
  Author: David Green <david.green at arm.com>
  Date:   2023-02-09 (Thu, 09 Feb 2023)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/arm64-xaluo.ll

  Log Message:
  -----------
  [AArch64] Protect against overflowing shift amounts in performSETCCCombine

In the attached test case we can get into positions where the shift gets a
constant shift amount that is negative or larger than the bitwidth, leading to
trying to create an invalid constant. Add a check to make sure we can handle it
without assertions.

Fixes #60530